In the following, you will find a slightly edited version of my post
in an Ars
Technica thread.
This is not the kind of Burn-In, I'm going to discuss here. The type
of Burn-In I'm referring to here, is the process to help CPUs achieve
higher clockspeeds and/or lower voltages.
The same applies to the "mobile ion" theory. If you had vagabonding ions in your CPU material, it would cause several unwanted parameter shifts. Semiconductor manufacturer usually try to get rid of any ionic contamination.
I also don't think the thermal grease or thermal pad between heatsink
and CPU has anything to do with the effect in question. It is true though,
that the thermal contact of this materials may become slightly better after
a couple of hours in use.
To detect the difference between "high" and "low" the CPU uses some kind of reference voltage. If the voltage of the signal is higher as the reference voltage, the signal is detected as "high", if it is lower, it is detected as "low".
The time the CPU has to detect the "high" or "low" states, is limited by the CPU clock. If the clock is set to higher speed, the time for detection, the "decision cycle", becomes shorter.
The signal itself is not at all digital. Its analogue.
Which means, it doesn't jump from "low" to "high" and back in no time,
it gradually rises from the lower level to the higher and back. This is
caused by parasitic capacitance's and resistors. They are called "parasitic",
because you rather would like them not to be there, but given the current
semiconductor manufacturing process, you can't avoid them.
In the design of the CPU, it is attempted to keep the parasitics as low as possible. Sometimes you run into a quagmire. If you make the resistance lower (for example wider metal lines have less resistance), you might increase the capacitance (wider metal lines have more capacitance). Which means, you will always end up with having the parasitics in one way or another.
The capacitance's "suck" away the rising voltage until the capacitance's are charged, the resistance's make matters worse by "resisting" the current flow which tries to charge the capacitance's. Temperature makes matters also worse, because heat further increases the resistance's in the CPU.
The transistors in the CPU also have some "internal" resistance's, if
you look at the transfer characteristics,
you will see a non-linear behaviour of the current versus the voltage.
If you (or the signal, for that matter) increase the voltage, the current
will start to flow at some certain voltage, the so called "threshold" and
it will become (almost) linear dependent on the voltage and then start
to saturate at an certain current level (not shown).
The driving force in the CPU is the core supply voltage of the CPU. Setting it to lower values would result in "slacker" swings and lower saturation current, setting it to higher values would steepen the swing and increase the saturation current, but since you are dissipating more power, you would also generate more heat in return.
If the combined parasitic and build-in effects limit the signal to the
point, where in the given "decision cycle" the CPU can't detect the change
from "high" to "low" or vice versa, the CPU will fail. Sometimes it will
fail only once in a while, or at specific instructions, it can even fail
unnoticed, because the internal error correction will step in. That's what
makes figuring out whether the system is stable or not so difficult.
Clock cycles too short. Temperature too high. Voltage too low. Transistors switch too slow.
Obviously, switching to a lower clock speed is not so desirable when trying to squeeze out the last MHz of performance out of your CPU.
For fighting too high temperatures, there are several methods, I don't want to discuss this in depth here. Just some basic hints: Use the fattest heatsink, throw sufficient air at it and make sure that heatsink and CPU have good thermal contact.
The operating voltage was easy to fiddle with in the old days, then motherboards without any voltage setting became popular with the P-II machines. Nowadays, there are again some boards with voltage tweaking capabilities. For increased overclockability, you can, very carefully, try bumping the corevoltage up in 50...100 mV steps. You have to be careful, not to exceed the point where it becomes counterproductive because of the additional heat generation. The power dissipation of a CPU goes non-linear up with the supplyvoltage. Which means a 5% increase of voltage could lead to 10% increase of power dissipation, a 10% increase of voltage could result in 30% more power dissipation. If the voltage is too high, you can reach the point of breakdown in the transistors, this would shorten the life of your transistor significantly, maybe even to zero.
If you are wondering, when the Burn-In comes to effect, it is in the "transistors switch too slow" point.
The transistors can made to switch faster with modifications in the
semiconductor manufacturing process. This would include scaled down sizes
for channel length or gate oxide thickness, optimisation in contacts and
wiring etc. pp. All of which you have no influence in.
This degradation starts as soon as the transistor is used and will eventually lead to the failure of it. Usually, the CPUs are designed to last almost forever. If you can live without that (who wants to use a lame 500 in 20 years anyway?), you can actually make use of this degradation for your overclocking.
The fun part of this kind of degradation is, that regarding to speed, it makes 50% of the transistors in your CPU a bit worse, but the other 50% would get much better.
This is because there are two different flavours of transistors in
the CMOS process, NMOS and the complementary PMOS. If your gateoxide has
incorporated negative charge in it, the NMOS would get a slacker swing,
the PMOS swing on the contrary, would become steeper. Thus, the PMOS usually
being the speedlimiting factor, the CPU at whole, which consists of NMOS
and PMOS transistors, would be able to run faster.
However, the physical effects are not yet understood completely. And that applies not only to me...
Anyway, you can speed up this degradation process with the Burn-In.
During the Burn-In you try to get as much hot electrons incorporated
in the gateoxide as possible. The hot-electron effect is sensitive to voltage
and temperature. The higher the voltage, the higher the effect, the higher
the temperature, the lower the effect. Thus, you would run your CPU at
minimum clockrate, maximum voltage and minimum temperature (remember, voltage
and temperature are dependent of each other). The time needed to incorporate
a sufficient number of electrons varies widely. It depends on the specific
CPU and what you expect out of it. Due to manufacturing variances, some
CPUs may be more susceptible to Burn-In than others from a different production
run. It may even be different with chips from the same wafer.
You can use several programs to stress your CPU. Usually, a high CPU usage is desired. Programs that can do that (and/or stress other components in your PC) would be 3dMark2000, BurnInTest, CPU Stability Test, ctRAMtest, Docmem, Dr. Hardware, Heavy Load, Linux Make, MemTest86, Prime95, Quake Demo Loop, RC5des, Seti@Home, WinZip, etc. pp.
Best, use all of them.
CAUTION! Most of above programs can crash your computer, if it is not perfectly stable. I would strongly reccomend, to make a backup of all your files before running them. A crashing computer might corrupt your filesystem and render all your data useless!
If it still hiccups, you may either need further Burn-In, or you need to re-evaluate other aspects of your machine (cooling, voltage, clockspeed etc.).
Simply put, if a couple of weeks of Burn-In didn't help, a couple of months probable won't either.
If problems persist, you can either go hard-core and try some funny stuff like submerging your computer in mineral oil or get a can of liquid nitrogen to pour over your CPU, or you may have to face the hard truth of overclocking:
Nothing is guaranteed in overclocking.
For a comprehensive list of overclocking successes and corresponding
voltages, cooling and production dates, visit www.overclockers.com.
If you will notice that or not, depends on how much extra juice you
try to squeeze out of it. If you run it at ridiculous high voltages or
clockspeeds, you may destroy it in a matter of seconds! All CPUs have
thermal cut-off's, true. But if you start with a cold CPU, you may have
destroyed the transistors before the CPU shuts itself up. Even if it runs
fine for weeks, you may have created a feedback situation in the transistors,
where the degradation gradually becomes worse and eventually destroys the
transistors.
All the burn in and voltage upping described here, is moot, if your CPU crashes because of overheating.
I highlighted the hot-electron degradation part as "Controversial Bits", because the occurrence of this effect in PMOS transistors is challenged by lots of people.
But unless anybody comes up with a better explanation than "PMOS hot-electron degradation can't occur" (which is simply untrue, the majority carriers, holes in PMOS transistors, gain under high channel fields enough energy, to generate electron-hole-pairs on impact. If those generated electrons then gain enough energy from the channel field, they could be injected into the gate oxide, usually near the drain junction. If they are injected deep enough into the gate lattice, they become trapped), I'll leave the bits in.
For additional reading regarding hot electron effects in PMOS, I suggest:
Y.-H. Lee, et al., “Channel-Width Dependent Hot-Carrier Degradation
of Thin-Gate pMOSFETs,”
IRPS, 2000, pp. 77-82.
J. Chen, K. Ishimaru, and C. Hu, “Enhanced hot-carrier induced degradation
in shallow trench isolated narrow channel pMOSFET’s,”
IEEE Electron Device Lett., vol. EDL-19, 1998, pp. 332-334.
G. Rosa, et al., “NBTI – channel hot carrier effects in pMOSFETs in
advanced CMOS technologies,”
IEEE/IRPS, 1997, pp. 282-286.
K. Quader, P.K. Ko, and C. Hu, “Simulation of CMOS circuit degradation
due to hot-carrier effects,”
IRPS, 1992, pp. 16-23.
M. Koyanagi, et al., “Hot-carrier induced punchthrough (HEIP) effect
in submicrometer pMOSFETs,”
IEEE Trans. Electron Devices, vol. ED-34, 1987, pp. 839-844.
Comments and suggestions are more than welcome. Please contact me.
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